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What exactly is PWM resolution ?

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Topic starter

Hey there everyone,

I've been reading up on PWM and came across something I'm a bit confused about. What exactly is PWM resolution?

I noticed that the UNO R3 has a PWM resolution of 10 bits, whereas the ESP32 has a 16-bit PWM resolution. I understand that more bits mean a more accurate dummy DAC signal, but how exactly does this work? Can someone explain the details behind PWM resolution and how it affects the signal quality?

Thanks in advance!

1 Answer
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Hey,

Note: UNO R3 supports 8-bit PWM resolution, not 10. 

Higher resolution means the PWM output can be more finely tuned, resulting in a smoother signal. This is particularly important in applications like motor control, LED dimming, and audio signal generation.

10-bit resolution means there are 256 possible duty cycle values (from 0 to 255). That's why the analogWrite(PWM pin, PWM value) takes values bw 0 and 255.  In this case, increasing the duty cycle step by step corresponds to a change of approximately 0.4% (1/256) of the full-scale value.

Whereas the 16-bit resolution means there are 65,536 possible duty cycle values (from 0 to 65,535).
Each step in the duty cycle corresponds to a change of approximately 0.0015% (1/65,536) of the full-scale value.

As much as the resolution is important, so does the frequency of the PWM signal. The increase in PWM resolution decreases the maximum PWM frequency possible for the same clock frequency.

For example, if UNO and ESP32 have the same clock frequency i.e., 16 MHZ. The maximum possible PWM frequency(16-bit) for ESP32 will only be 244 Hz. Whereas for UNO(8-bit), it is 62.5 KHz. 

16 MHz / 256 and 16 MHz / 65,536.
Divyam Topic starter 13/07/2024 3:54 am

@ankunegi Thank you for explaining in detail. Although I don't really get the last part: "The maximum possible PWM frequency" section.

Admin Admin 16/07/2024 5:10 am

The microcontroller uses a timer to generate the PWM signal. The timer counts up from 0 to a maximum value. When it reaches the maximum, it resets to 0 and starts counting again. The duty cycle is determined by the value at which the timer output switches from low to high.

For 8-bit resolution (UNO): The timer counts from 0 to 255. To achieve the maximum PWM frequency, the timer should overflow as quickly as possible. So, the maximum PWM frequency is the clock frequency divided by the maximum count: 16 MHz / 256 = 62.5 kHz.
For 16-bit resolution (ESP32): The timer counts from 0 to 65,535. Using the same logic, the maximum PWM frequency is 16 MHz / 65,536 = 244 Hz.
In essence, higher resolution requires the timer to count to a larger number before overflowing, which takes more time. This directly limits the maximum possible PWM frequency.

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